发明名称 |
Apparatus for rejecting time base error of video signal |
摘要 |
A time base correcting apparatus for reducing hindrance to a carrier chrominance signal due to clock jitter, when a sampling clock is generated by a digital circuit. In the time base correcting apparatus, a video signal is sampled with a clock synchronized with the video signal to be written to an FIFO memory. The video signal is then read out therefrom with a fixed clock to remove time base changes of the video signal. The fixed read clock is generated by multiplying two different frequency signals together, where one of the signals has a lower frequency approximately equal to (n+1/4) f (where n is an arbitrary integer, and f is a horizontal sync frequency) and using one of the resultant sidebands obtained through use of a bandpass filter. The read clock frequency is separated by 1/2 f from the other sideband frequency to reduce hindrance between the signals, and in turn to reduce viewable hindrances during the display of the video signal read out from the FIFO.
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申请公布号 |
US5303061(A) |
申请公布日期 |
1994.04.12 |
申请号 |
US19920894923 |
申请日期 |
1992.06.08 |
申请人 |
MATSUSHITA ELECTRIC INDUSTRIAL CO., LTD. |
发明人 |
MATSUMOTO, TOKIKAZU;KOGA, FUMIAKI;KITAURA, HIROMU;INOUE, TAKASHI;OGAWA, NOBUYUKI |
分类号 |
H04N5/956;(IPC1-7):H04N9/89 |
主分类号 |
H04N5/956 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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