发明名称 Semiconductor memory and process for manufacturing the same
摘要 A semiconductor memory comprises a plurality of non-volatile DRAMs and volatile DRAMs overlaying an identical semiconductor substrate, each of the non-volatile DRAMs comprising a word select transistor having a word selective gate electrode, a recall transistor having a recall gate electrode, a Flotox type memory transistor having a floating gate electrode and a capacitor having a storage node and a capacitor electrode, and each of the volatile DRAMs comprising a select transistor having a selective gate electrode and a capacitor having a capacitor lower electrode, a storage node and a capacitor upper electrode; the word selective gate electrode, the recall gate electrode and the floating gate electrode in the non-volatile DRAM and the selective gate electrode and the capacitor lower electrode in the volatile DRAM being formed of a first conductive layer on the semiconductor substrate, the storage nodes in the non-volatile DRAM and volatile DRAM being formed of a second conductive layer on the first conductive layer, the capacitor electrode in the non-volatile DRAM and the capacitor upper electrode in the volatile DRAM being formed of a third conductive layer on the second conductive layer, and any of the lower electrode and the upper electrode being common to a lower electrode and a upper electrode in their adjacent cells.
申请公布号 US5303186(A) 申请公布日期 1994.04.12
申请号 US19920963758 申请日期 1992.10.20
申请人 SHARP KABUSHIKI KAISHA 发明人 YAMAUCHI, YOSHIMITSU
分类号 H01L27/10;G11C14/00;H01L21/8242;H01L27/108;H01L27/115;(IPC1-7):G11C13/00 主分类号 H01L27/10
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