| 摘要 |
The video signal processing circuit is for extracting a synchronous signal from a video signal of NTSC and PAL type and for detecting an even or an odd field using one chip. The circuit comprises a synchronous signal detector (1) for extracting a horizontal and a composite synchronous signal from a video signal, a vertical synchronous signal detector (2) for extracting a vertical synchronous signal, a window pulse generator (3) for generating window pulses with pulse width varying by NTSC mode or PAL mode, an even/odd field detector (4) for detecting number of vertical clock signal within the window pulse width, and a vertical blanking period detector (5) for counting the vertical synchronous signal.
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