| 摘要 |
<p>PURPOSE:To accurately read '0', '1' data from a memory cell by stabilizing a reference potential to be obtained based on a dummy cell. CONSTITUTION:Electrons are previously extracted from a floating gate of a dummy cell DC by an erasing circuit EC. A bias is applied from a data line bias circuit DBC to a memory cell C selected by a selector (row decoder RD, a column decoder CD). A detection signal VSA from the bias circuit DBC is output as a different value according to whether its current flows or not. A bias is applied from the circuit DBC to the cell DC, and a current flows to the cell DC. A reference voltage VREF responsive thereto is output from a dummy data bias circuit DDC as a stable value. The two voltages VSA, VREF are compared by comparing means (differential amplifier SA), and storage data of the selected cell C is detected.</p> |
