发明名称 SINGLE CHIP MICROCOMPUTER
摘要 <p>PURPOSE:To improve the security of a system program, etc., by making a trap request signal to a CPU significant when an operational code is fetched from an external memory area at the time of a memory expansion mode operation. CONSTITUTION:A fetch detecting means 7 is provided to generate the trap request signal when the operational code is fetched from the external memory area while the single chip microcomputer is operated in a memory expansion mode. When the operational code is fetched from the external memory area, in the memory expansion mode, the fetch detecting means 7 sets a jump destination vector at the time of trap to a built-in ROM area by sending the trap request signal for requesting the generation of forced trap interruption not to be masked by the program so that a user can limit the program at the time of trap generation, and a ROM 2 can be prevented from being illegally read out.</p>
申请公布号 JPH0696235(A) 申请公布日期 1994.04.08
申请号 JP19920272519 申请日期 1992.09.16
申请人 MITSUBISHI ELECTRIC CORP 发明人 NAKAJIMA TOYOKATSU
分类号 G06F12/14;G06F9/06;G06F15/78;G06F21/22;(IPC1-7):G06F15/78 主分类号 G06F12/14
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