| 摘要 |
PURPOSE:To expand the range of the variation of the frequency characteristics of a circuit which is composed of a speed detector and a digital filter connected to it as its post-stage and, further, switch the frequency characteristics instantaneously. CONSTITUTION:A subtractor 13 subtracts an input time of a speed detection signal; which is a signal one cycle before a current speed detection signal and is supplied by a delay device 12 from an input time of the speed detection signal currently inputted to obtain a period D1 of the speed detection signal. A subtractor 14 subtracts a target period L1 from the period D1 to obtain a speed error data E1. A subtractor 17 subtracts an input time of a speed detection signal which is a signal (n) cycles before the current speed detection signal (wherein (n) denotes a positive integer not smaller than 2) and is supplied by a delay device 16 from the input time of the speed detection signal currently inputted to obtain a period D2 of the speed detection signal. A subtractor subtracts 18 a target period L2 from the period D2 to obtain a speed error data E2. An adder 20 adds E3 and E4 which are results obtained by multiplying E1 and E2 with respective factors by multipliers 15 and 19 to each other and synthesizes a speed error signal E. |
