| 摘要 |
PURPOSE:To provide a clock phase adjustment device capable of accurately performing the phase adjustment under an environment with a large temperature fluctuation and the variable delay circuit in a circuit with the large delay time dispersion such as CMOSLSI. CONSTITUTION:The size of load is designed to be changed by transfer gates 101-104, 111-114. When a path with the shortest delay time is selected in a variable delay circuit selecting paths with different delay times by selector circuits 501-508, the path bypassing one part of the selector circuit is provided. With the two kinds of variable delay circuits, the former variable delay circuit deals with temperature change and the phase difference due to element dispersion is adjusted by the latter one. Thus, as any high-speed circuit is required so as to follow up the temperature change during the operation and the shortest delay time of the variable delay time can be made shorter, the dispersion of the delay time of the variable delay circuit can be easily reduced. |
