发明名称 NONVOLATILE SEMICONDUCTOR MEMORY
摘要 <p>PURPOSE:To shorten a writing time and to accelerate erasing at a high speed by applying a high voltage to a control gate of a memory cell, and simultaneously writing it by a tunnel current flowing from a channel region to a floating gate. CONSTITUTION:A predetermined drain voltage VD, a control gate voltage Vcc are applied to a row decoder RD and a cell(C) selected by a column gate CG. Then, hot electrons are generated in a high electric field near a drain, and simultaneously written by a tunnel current to be injected in a floating gate. In this case, an electric field is generated from a channel(Ch) to a gate (FG) near a source S. In the case of erasing, when all the bits are simultaneously written and the voltages VCC, VD are set to predetermined values, a tunnel current from the vicinity of the source is injected in the gate FG. Then, a drain current is reduced as compared with the case of ordinarily writing, and simultaneous writing is performed without wire disconnection due to an overcurrent. Thus, a writing time is shortened, and erasing can be accelerated at a high speed.</p>
申请公布号 JPH0696592(A) 申请公布日期 1994.04.08
申请号 JP19920243677 申请日期 1992.09.11
申请人 TOSHIBA CORP 发明人 MIYAGAWA TADASHI;ASANO MASAMICHI
分类号 G11C17/00;G11C16/02;G11C16/06;(IPC1-7):G11C16/06 主分类号 G11C17/00
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