发明名称 ARITHMETIC CIRCUIT
摘要 PURPOSE:To easily perform an operation test by constituting the testing circuit of a carry look-ahead circuit by a dynamic inverter whose input is the output signal of a logical gate. CONSTITUTION:By inputting the output of a NAND gate 14 to the dynamic inverter 11, the output of the inverter 11 is changed from high to low. In this case, when a signal 7 is not activated, the signal 7 is at a low level at all times so that pulses are not generated to the output 14. Thus, the output 12 remains at a high level at all times. When only an arithmetic result is considered, since carry transmitted through the internal part of an arithmetic device is outputted for carry output 10, a normal result can be obtained. However, since the carry is not looked ahead, a highest operational frequency is lowered. Also, when carry look-ahead conditions are active at all times and a fault occurs, since the correct carry output 10 is not obtained, the fault is easily discriminated.
申请公布号 JPH0689161(A) 申请公布日期 1994.03.29
申请号 JP19920237962 申请日期 1992.09.07
申请人 NEC CORP 发明人 KOYA HIROSHI
分类号 G06F7/38;G06F7/499;G06F7/50;G06F7/506;G06F7/508 主分类号 G06F7/38
代理机构 代理人
主权项
地址