发明名称 SEMICONDUCTOR MEMORY
摘要 PURPOSE:To store input data written in a shift register previously till a reset signal is inputtd. CONSTITUTION:A reset control circuit 21 is provided by which a counter 20 and a latch signal generation circuit 22 are reset and controlled. Then when a reset signal RESET is inputted, control signals A, B, C are outputted by the reset control circuit 21, and a latch signal WS is generated by the latch signal generation circuit 22 at the timing according to the number of the input data which have been written in the shift register. Further, a select signal LS of a selector provided between the shift register and the latch is generated by the latch signal generation circuit 22, and the input data written in the shift register till the reset signal RESET is inputted is stored in a memory cell.
申请公布号 JPH0689593(A) 申请公布日期 1994.03.29
申请号 JP19920240301 申请日期 1992.09.09
申请人 MATSUSHITA ELECTRIC IND CO LTD 发明人 NAKAYA SHUJI
分类号 G11C19/00;G11C8/04 主分类号 G11C19/00
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