Input circuit for integrated semiconductor device - provides difference between level shifted versions of binary input signal and reference voltage

摘要

The input circuit receives a binary signal and provides one of two different potentials in response to the binary signal value. A level shifting circuit (LS1) coupled to the binary signal input (3) and a reference voltage input (4), supplies level shifted versions of the input signal and the reference voltage to a differential amplifier cascade (Dif1, Dif2). This supplies a difference signal to a complementary MOSFET inverter (In1) providing the two alternate output potentials. Pref. the amplifier cascade uses a number of difference amplifiers, each comprising a complementary MOSFET amplifier circuit and current reflection load. ADVANTAGE - High-speed operation independent of variations in reference voltage.