发明名称 |
Data processor. |
摘要 |
<p>A processor comprises a first ALU 40 and a second ALU 42 and 12 registers 44-0 to 44-11. It is a control section 46 that controls the first and second ALUs 40 and 42 and the 12 registers 44-0 to 44-11. Serial operation instructions input to the processor are executed only by the first ALU 40. At which time, the second ALU 42 stops. When a parallel operation instruction is input, it is executed by the first and second ALUs 40 and 42 in parallel. The first ALU 40 can access common registers 44-0 to 44-3 and dedicated registers 44-4 to 44-7 and the second ALU 42 can access the common registers 44-0 to 44-3 and dedicated registers 44-8 to 44-11. Therefore, the processor can switch parallel and serial operations, thereby facilitating manufacturing and design of the architecture and design of software given to the processor. <IMAGE></p> |
申请公布号 |
EP0588341(A2) |
申请公布日期 |
1994.03.23 |
申请号 |
EP19930114923 |
申请日期 |
1993.09.16 |
申请人 |
TOYOTA JIDOSHA KABUSHIKI KAISHA |
发明人 |
HOSHINA, TAKESHI;IIDA, YOSHIO |
分类号 |
G06F9/30;G06F9/38;G06F15/78;(IPC1-7):G06F9/38;G06F15/80 |
主分类号 |
G06F9/30 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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