发明名称 Sample-and-hold circuit
摘要 A sample-and-hold circuit includes two capacitors connected to an input signal line through respective analog switches for holding an input signal. An amplifier circuit of the sample-and-hold circuit includes two input terminals for receiving voltages held in the respective two capacitors and for amplifying the received voltages. The amplifier circuit alternately amplifies the voltages received through the two input terminals.
申请公布号 US5296751(A) 申请公布日期 1994.03.22
申请号 US19920855677 申请日期 1992.03.23
申请人 SHARP KABUSHIKI KAISHA 发明人 SANO, YOSHIKI
分类号 G11C27/02;(IPC1-7):G11C27/02 主分类号 G11C27/02
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