发明名称 Doubling circuit
摘要 A doubling circuit for adjusting the duty ratio of an output signal automatically and implemented as a digital circuit. A variable delay circuit delays an input signal while an exclusive-OR (EOR) gate produces EOR of the output signal of the delay circuit and the input signal. The resulting output of the EOR gate has a frequency double the frequency of the input signal. A low pass filter (LPF) filters the output signal of the EOR gate to produce a means voltage thereof. An integrating circuit integrates a difference between the output voltage of the LPF and a reference voltage. The delay of the variable delay circuit is controlled by the output of the integrating circuit. As a result, the doubled signal from the EOR gate has the duty ratio thereof automatically adjusted.
申请公布号 US5297179(A) 申请公布日期 1994.03.22
申请号 US19920874631 申请日期 1992.04.27
申请人 NEC CORPORATION 发明人 TATSUMI, SATOSHI
分类号 H03K3/017;H03K5/00;(IPC1-7):H03B19/00 主分类号 H03K3/017
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