| 摘要 |
<p>PURPOSE:To enable read control at an ATM switch with one kind of LSI chips by distributedly arranging a memory for managing the arrival order of cells for each cross point. CONSTITUTION:The cells inputted through an input highway are successively stored in cell buffers 1-1...1-N in the order of arrival. Based on required information from an information transmission network 4 and the correspondent outputs of FIFO memories 2-1...2-N for managing the arrival order of cells, cell read control parts 3-1...3-N respectively read the cells from the cell buffers. Thus, since the FIFO memory for managing the arrival order of cells is distributedly provided for each cross point, cell read control at the ATM switch is enabled with one kind of LSI chips.</p> |
