SEMICONDUCTOR MEMORY DEVICE

摘要

PURPOSE:To prevent the fluctuations of a power source potential and a grounded potential due to a noise in a device comprizing a NAND type memory cell group. CONSTITUTION:When data from NAND type cell group C1-Cm are applied to a bit line bias circuit BB, the circuit BB applies a signal VSA according to the input data on one input end of a differential amplifier SA. When signals from a first dummy cell group DC1a-DCna and from the second dummy cell group DC1-DCn are inputted to a dummy bit line bias circuit DBB, the circuit DBB applies a reference potential VREF according to two input signals on the other input end of the amplifier SA. The circuit SA outputs an output Dout based on the two signals. Since the gate of the respective cells of the cell groups and the gate of the first dummy cell groups are connected in common to the respective selection lines while the memory groups and the dummy groups are constituted in the same array, the fluctuations of the power source potential Vcc and the grounded potential Vss appear to two cell groups in common and consequently, are cancelled.