| 摘要 |
PURPOSE: To eliminate multiple spare columns, to reduce a layout area and to facilitate high integration by cutting only zero to three fuses in accordance with selected inputs/outputs when eight inputs and outputs exist. CONSTITUTION: When input/output selection fuses 11-13 are cut, the output terminals of the fuses 11-13 become low/high levels. Thus, all the NAND inputs of a decoder part 21 in input/output decoder parts 21-28 become the high levels, one input of the decoder parts 22-28 becomes the low level, the output side of the decoder part 21 becomes the low level. Only when a ready signal inputted to the NOR gate is the low level, the gate inputs of the transistors NM11 and NM12 inputted to a spare transfer part 31 become high and information of a spare bit inputted to a drain is connected to a data bus DB. Thus, one of eight inputs/outputs can be selected by cutting three fuses and the layout area can be reduced without the need of multiple spare columns. |
