发明名称 SEMICONDUCTOR MEMORY CIRCUIT
摘要 PURPOSE:To simplify the layout of a data input/output part between select and sense amplifying circuits and an external circuit and to reduce the chip area. CONSTITUTION:1st and 2nd select and sense amplifying circuits SSA11-SSA17, and SSA21 and SSA22 are provided with input/output switching circuits IOS 1-IOS9 one to one. Those input/output switching circuits IOS1-IOS9 and data buses DB11, DB12-DB41, and DB42 are so connected that the number of memory cell arrays which can be connected to those data bus becomes equal.
申请公布号 JPH0676575(A) 申请公布日期 1994.03.18
申请号 JP19930144147 申请日期 1993.06.16
申请人 NEC CORP 发明人 MATSUI YOSHINORI
分类号 G11C11/409;G11C11/401;G11C11/41;H01L21/8242;H01L27/108 主分类号 G11C11/409
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