| 摘要 |
<p>PURPOSE:To reduce the package area of a data buffer and reduce the size and weight of the device by minimizing the number of input pins for an address signal selecting a memory even when the data buffer has a large memory. CONSTITUTION:A data signal line from a resistor group 5 are connected to the internal buffer of the data buffer 6, some of them are connected to an internal attribute memory, and when ROMs 3 and 4 are read, only the buffer is made active. When the ROMs 3 and 4 are placed in a nonoperation state, only the attribute memory is made active and attribute data are outputted with the address signal based upon the potential of a power source terminal which is supplied through an address signal line 17, the ground potential supplied through an address signal line 18, and the potential of the resistor group 5 supplied through the signal line 16. Therefore, even when the buffer 6 has a large memory, the number of input pins for the address signal is minimized and the package area of the buffer 6 is suppressed to reduce the size and weight of the device.</p> |
