| 摘要 |
<p>A tuned ring oscillator circuit comprises a ring oscillator (22) including inverting stages (26, 28) connected in series in an oscillator ring and a programmable frequency divider (40) for providing coarse control of the repetition rate of an output clock pulse (44). The progammable divider has an input terminal coupled to the ring oscillator (22) and has an output terminal at which is provided the output clock pulse (44). A control gate (24, 70) inhibits propagation of an oscillating signal through the oscillator ring and is connected in series with the inverting stages (26, 28). The gate means has a control terminal for controlling propagation of the oscillating signal. A programmable delay line (52 to 57) provides fine control of the repetition rate of the output clock pulse. The delay line includes a delay time programming device (58 to 61) for setting a delay time and has program input terminals for receiving control signals and an input terminal coupled to the output terminal of the frequency divider (40). The ouput terminal of the delay line is coupled to the control terminal of the control gate (24, 70). A comparator (100) compares the output clock pulse frequency with the frequency of a system reference pulse and generates control signals for the delay line (52, 57) to provide fine adjustment of the delay time of an output clock pulse to tune the frequency of the ring oscillator (22) to the frequency of the system reference pulse.</p> |
