发明名称 Wide variation timed delayed digital signal producing circuit
摘要 A time delayed digital circuit includes three circuits, each of which includes two inverters used in charging and discharging a capacitor to produce a precisely delayed output digital signal which can have wide variations.
申请公布号 US5294848(A) 申请公布日期 1994.03.15
申请号 US19920966646 申请日期 1992.10.26
申请人 EASTMAN KODAK COMPANY 发明人 KANNEGUNDLA, RAM
分类号 H03K5/00;H03K5/13;(IPC1-7):H03K5/13;H03K17/28 主分类号 H03K5/00
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