发明名称 JUNCTION-INSULATED MOS INTEGRATED DEVICE
摘要 PURPOSE: To bias so as to obtain a uniform potential distribution in a protective region and avoid an early stage breakdown by a method wherein a double capacitor chain having conductive regions which are buried in an insulating layer and provided above an epitaxial pocket - an insulating region junction is provided. CONSTITUTION: Rings 11 which define a 1st chain of capacitors connected approximately in series provide a linear potential distribution in the junction region of an insulating region 18 - an epitaxial pocket 8 and, by emptying gradually, a protective link 19 maintains a linear potential close to the distribution of the insulating region 18, so that the early stage breakdown of a device which is caused by an excessive electric field produced by a connection part above the insulating region 18 can be avoided. The width (1) of each ring 11 and the spacing (d) between the rings 11 have influence upon the linearity of the potential distribution between the polysilicon rings and, on the other hand, the length and surface density of the protective link around the insulating region 18 determines the maximum breakdown voltage of the device.
申请公布号 JPH0669511(A) 申请公布日期 1994.03.11
申请号 JP19930090055 申请日期 1993.04.16
申请人 SGS THOMSON MICROELETTRONICA SPA 发明人 ENRIKO MARIA ARUFUONSO RABUANETSURI;FURABUIO BUITSURA
分类号 H01L29/06;H01L29/40;H01L29/78 主分类号 H01L29/06
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