发明名称 METHOD FOR CONTROLLING SEMICONDUCTOR WAFER PRODUCTION LINE
摘要 <p>PURPOSE:To improve production efficiency and reduce lead time by totaling information on the number of wafers processed in the past and the number of wafers being processed for each machining process during a certain period. CONSTITUTION:Data on the number of wafers processed in the past and the number of wafers being processed are occasionally collected at a terminal 3 of each process for a certain amount of period from each device 4, thus obtaining a correlation between the number of wafers processed and the number of wafers being processed. In the case of a process with characteristics affecting the number of wafers processed when the number of wafers being processed fluctuate, the number of wafers being processed for obtaining the number of needed wafers to be processed is obtained by a regression straight line or an approximation curve as process characteristics and are transferred to a host 1 via a LAN 2. The host 1 gathers data for each process and checks the number of wafers processed at each process, thus controlling the number of wafers being processed quantitatively and reducing the lead time of a product along with the reduction in the number of wafers being processed.</p>
申请公布号 JPH0669089(A) 申请公布日期 1994.03.11
申请号 JP19920221127 申请日期 1992.08.20
申请人 NEC YAMAGATA LTD 发明人 SATO AKIRA;MURAOKA YUKIHIRO
分类号 H01L21/02;B65G61/00;G05B19/418;G06Q50/00;G06Q50/04;(IPC1-7):H01L21/02;G06F15/21 主分类号 H01L21/02
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