| 摘要 |
PURPOSE:To enable the simultaneous formation of bit contact holes in the memory cell region and contact holes in the peripheral circuit region in wiring bit lines in a dynamic RAM having stacked capacitors. CONSTITUTION:This wiring structure is for dynamic RAMs 1 having stacked capacitors 41 in memory cell regions 21. A plate electrode formation film 53 is formed on the entire surface on the capacitor dielectric film 44 side or at least on the bit contact formation parts 24 in the memory cell region 21 and the contact formation parts 34 in the peripheral circuit region 31. Thereafter, a second interlayer insulating film 15 is formed to cover the plate electrode formation film 53. Bit contact holes 25 and contact holes 26 are formed, through the plate electrode formation film 53, in the individual bit contact formation parts 24 and contact hole formation parts 34, respectively. An insulating film 26 and 37 is formed on the sidewall of each contact hole 25 and 36. Bit lines 8 for connecting to the bit contact holes 25 and contact holes 36 are then formed. |
