发明名称 Dual gate MESFET.
摘要 It is an object of the present invention to provide a dual-gate type MESFET having a high drain breakdown voltage and excellent high-frequency characteristics. A semiconductor substrate used in the present invention is obtained by sequentially forming a non-doped buffer layer (2), a thin first pulse-doped layer (3) having a high impurity concentration, and a cap layer (7) on an underlying semiconductor substrate (1) by epitaxial growth. The cap layer (7) has a thin second pulse-doped layer (5) having a high impurity concentration sandwiched between non-doped layers (4, 6). The thickness and impurity concentration of the second pulse-doped layer (5) are set such that the second pulse-doped layer (5) is depleted by a surface depletion layer caused by the interface state of the cap layer surface, and the surface depletion layer does not extend to the first pulse-doped layer (3). A source electrode (13), a drain electrode (16), and first and second gate electrodes (14, 15) are formed on the semiconductor substrate surface. High-impurity-concentration ion implantation regions (10, 11, 12) are formed at a source electrode formation region, a drain electrode formation region, and a region between the first and second gate electrode formation regions to extend from the semiconductor substrate surface to the first pulse-doped layer (3). The second electrode (15) formed on the drain electrode side is sufficiently separated from the high-impurity-concentration ion implantation region (12) below the drain electrode (16). <IMAGE>
申请公布号 EP0585942(A1) 申请公布日期 1994.03.09
申请号 EP19930114146 申请日期 1993.09.03
申请人 SUMITOMO ELECTRIC INDUSTRIES, LTD. 发明人 SHIGA, NOBUO
分类号 H01L21/338;H01L29/10;H01L29/80;H01L29/812 主分类号 H01L21/338
代理机构 代理人
主权项
地址