发明名称 Analysis and optimization of array variables in compiler for instruction level parallel processor
摘要 A process for optimizing compiler intermediate representation (IR) code, and data structures for implementing the process; the process is preferably embodied in a compiler computer program operating on an electronic computer or data processor with access to a memory storage means such as a random access memory and access to a program mass storage means such as an electronic magnetic disk storage device. The compiler program reads an input source program stored in the program mass storage means and creates a dynamic single assignment intermediate representation of the source program in the memory using pseudo-machine instructions. To create the dynamic single assignment intermediate representation, during compilation, the compiler creates a plurality of virtual registers in the memory for storage of variables defined in the source program. Means are provided to ensure that the same virtual register is never assigned to more than once on any dynamic execution path. An expanded virtual register (EVR) data structure is provided comprising an infinite, linearly ordered set of virtual register elements with a remap() function defined upon the EVR. Calling the remap() function with an EVR parameter causes an EVR element which was accessible as (n) prior to the remap operation to be accessible as (n+1) after the remap operation. A subscripted reference map comprising a dynamic plurality of map tuples is used. Each map tuple associates the real memory location accessible under a textual name with an EVR element. A compiler can use the map tuple to substitute EVR elements for textual names, eliminating unnecessary load operations from the output intermediate representation.
申请公布号 US5293631(A) 申请公布日期 1994.03.08
申请号 US19910741292 申请日期 1991.08.06
申请人 HEWLETT-PACKARD COMPANY 发明人 RAU, BANTWAI R.;SCHLANSKER, MICHAEL
分类号 G06F9/45;(IPC1-7):G06F9/44 主分类号 G06F9/45
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