发明名称 |
Circuit with predetermined delay for selectively relaying interrupt signals through a daisy-chain of linked modules upon removal of a module from a slot |
摘要 |
A computer having a plurality of plug-in modules is provided with a holding circuit for transmitting an interrupt signal over an interrupt signal line. The holding circuit conducts the interrupt signal in the appropriate manner regardless of whether or not a given module is plugged in. At the same time it ensures that a plugged-in module responds to the interrupt signal in the appropriate manner.
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申请公布号 |
US5293589(A) |
申请公布日期 |
1994.03.08 |
申请号 |
US19900472503 |
申请日期 |
1990.01.30 |
申请人 |
FORCE COMPUTERS GMBH |
发明人 |
SKORDOU, EVANGELOS;HOFMANN, STEFAN |
分类号 |
G06F13/24;(IPC1-7):G06F13/37 |
主分类号 |
G06F13/24 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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