发明名称 Trench planarization techniques
摘要 Various techniques for quantifying polishing performance are disclosed, and provide insight on the progression from a planarization regime to a smoothing regime to a blanket polish back regime, as well as providing a single, definable parameter (Quality Characteristic) for optimizing polishing performance. With these analytical tools in hand, it is possible to create novel structures which absorb polish rate non-uniformities across a wafer, and it is also possible to define and employ a "quick" polish step to clear high spots which will be followed by a subsequent etch step for rapid removal of material.
申请公布号 US5290396(A) 申请公布日期 1994.03.01
申请号 US19910711624 申请日期 1991.06.06
申请人 LSI LOGIC CORPORATION 发明人 SCHOENBORN, PHILIPPE;PASCH, NICHOLAS F.
分类号 C03C15/00;C03C25/68;H01L21/304;H01L21/3105;H01L21/762;H01L23/522;H01L23/528;H05K1/11;H05K3/46;(IPC1-7):H01L21/00 主分类号 C03C15/00
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