发明名称 SIGNAL LEVEL DISCRIMINATOR
摘要 PURPOSE:To obtain the level discriminator of high accuracy, by connectig a plurality of MOSFETs of different threshold voltage in series and taking the gate as the input terminal through common connection and picking up the output from the drain of each FET. CONSTITUTION:N channel MOSFET Q10-Q14 are connected in series sequentially, and a given input VGG is fed to the gates in common connection. Each drain of FET Q10-Q14 are the output electrodes D1-D5 and are connected to the positive power supply VDD via the load resistors R10-R14. The source of FET Q10 is connected to the minimum potential VSS. When the threshold voltages VT1-VT5 of each FET is selected so that it is sequentially increased, in case of measured voltage VGG<VT1, all the FETs are OFF and the outputs D1-D5 are all 1. Further, when VT1<VGG<VT2, FET Q10 in ON, the output D1 is 0, and others are 1. Accordingly, the input voltage level can be discriminated in plural steps with the potential state, and the comparator of high accuracy can be obtained.
申请公布号 JPS55104122(A) 申请公布日期 1980.08.09
申请号 JP19790029625 申请日期 1979.03.14
申请人 PIONEER ELECTRONIC CORP 发明人 HIRASHIMA KUNIHIKO
分类号 H03K5/08;G01R19/165 主分类号 H03K5/08
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