发明名称 Method of manufacturing semiconductor devices having a resist patern coincident with gate electrode
摘要 A method of manufacturing a semiconductor device including a MOS transistor, wherein a second resist pattern having openings respectively defining gate, source, and drain regions is formed while leaving a first resist pattern on a gate material film, i.e., a polycrystalline silicon film, which is used to form a gate electrode. Impurities are implanted into the source and drain regions by using the first and second resist patterns as a mask. The impurities are stopped in the inside of the first resist pattern on the gate and are not implanted into the gate.
申请公布号 US5290717(A) 申请公布日期 1994.03.01
申请号 US19920896571 申请日期 1992.06.10
申请人 KAWASAKI STEEL CORPORATION 发明人 SHIMAZU, KATSUHIRO
分类号 H01L21/265;H01L21/266;H01L21/336;H01L29/78;(IPC1-7):H01L21/265 主分类号 H01L21/265
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