发明名称 MULTIPLEX PROTECTION CIRCUIT
摘要 <p>PURPOSE:To provide the multiplex protection circuit small in memory capacity in the protection circuit for detecting specified pattern. CONSTITUTION:This circuit is provided with an n-k encoder 12 to perform n-k code conversion corresponding to a value (k) expressing a value (n) as a binary number concerning the (n) pieces of specified patterns detected by 1st detection part 11a to n-th detection part 11n for detecting the (n) pieces of certain specified patterns in input data, memory 13 to write a code outputted from the n-k encoder 12 and to read the (k) pieces of outputs corresponding to the code so as to enable multiplex protection, and 1st k-n decoder 14a to k-th k-n decoder 14k to decode the (k) pieces of outputs from the memory 13 and to recover the detected results of the (n) pieces of source specified patterns, and the capacity of the memory 13 for performing multiplex protection conversion is reduced by using the code results of the (n) pieces of specified patterns.</p>
申请公布号 JPH0651948(A) 申请公布日期 1994.02.25
申请号 JP19920203364 申请日期 1992.07.30
申请人 FUJITSU LTD 发明人 OKU TATSUYA
分类号 G06F7/04;G06T1/00;H03M7/22;H04L1/08;H04L7/08;H04L29/14;(IPC1-7):G06F7/04;G06F15/62 主分类号 G06F7/04
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