发明名称
摘要 An output buffer circuit is disclosed that minimizes signal oscillation or ringing on a data bus while limiting the power dissipated. This circuit includes a pair of reference voltage generators which provide damp voltages that limit the signal oscillation and a mechanism for shutting down the appropriate generator when it is not operating. The output buffer circuit has the capability of driving the output resistors to their CMOS levels in order to maximize the sinking and sourcing currents.
申请公布号 EP0574184(A3) 申请公布日期 1994.02.23
申请号 EP19930304317 申请日期 1993.06.03
申请人 ADVANCED MICRO DEVICES, INC. 发明人 MAHMOOD, QAZI
分类号 H03K17/16;H03K19/003;H03K19/0175 主分类号 H03K17/16
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