| 摘要 |
The arrangement comprises equalizer control signal generator means (45) for generating a first control signal (cs1) and a second control signal (cs2) to be applied to a first and a second control signal input (6,7) of the variable equalizer means, and bit array selector means (15a, 15b, 19a, 19b) for supplying a selection signal upon selection of a specific array of bits in the digital signal obtained after detection in a detector (10a). Sample-and-hold circuits (26,28) sample the analog signal read from tape under the influence of the detection signal so as to obtain first and second sample values (s1,s2). The first and second sample values are applied to the control signal generator (45). The control signal generator means (45) generates the first and second control signal in response of the sample values applied. The first control signal relates to the sum of the two sample values, and the second control signal relating to the difference between the two sample values. The signal can be equalized regards magnitude in response to the first control signal so as to bring the sum of the two sample values to substantially zero and as regards phase in response to the second control signal so as to bring the difference of the two sample values to substantially zero. <IMAGE> |
