发明名称 |
Transparent enable test circuit |
摘要 |
A test circuit for two level latches on an integrated circuit to be tested includes a test enable driver circuit coupled to a third level switch which is connected in series between the latches to be tested and a low voltage source. The third level switch converts the two level latches to be tested into a buffer such that data applied as an input to the two level latches appears in identical form as data at the output pin of the integrated circuit chip.
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申请公布号 |
US5289119(A) |
申请公布日期 |
1994.02.22 |
申请号 |
US19920870865 |
申请日期 |
1992.04.20 |
申请人 |
UNISYS CORPORATION |
发明人 |
SCHROEDER, DUANE A.;HIME, DAVID M. |
分类号 |
G01R31/3185;(IPC1-7):G01R31/28 |
主分类号 |
G01R31/3185 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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