发明名称 NRZ DATA-BIT SYNCHRONIZING DEVICE
摘要 PURPOSE: To stably restore NRZ data and clocks. CONSTITUTION: Even when not only PLL loop gain does not sensitively change, corresponding to a bit pattern and a bit speed of inputted NRZ data but also the NRZ data are not shifted and the range of the clock frequency change of a voltage-controlled oscillator 27 is large, the voltage-controlled oscillator 27 is made to oscillate so as to be synchronized with the multiple of the frequency of an external reference clock pulse REFCP. Thus, an NRZ data bit synchronization device for stably restoring the NRZ data and the clocks is obtained.
申请公布号 JPH0646045(A) 申请公布日期 1994.02.18
申请号 JP19930058661 申请日期 1993.03.18
申请人 ELECTRON & TELECOMMUN RES INST;KORIA TELECOMMUN OOSORITEI 发明人 I BOMU CHIYORU;BAKU GUON CHIYORU;BAKU HAN GU
分类号 H03L7/089;H03L7/093;H03L7/107;H03L7/14;H04L7/00;H04L7/033 主分类号 H03L7/089
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