发明名称 |
MULTIPLE SUB SAMPLE SIGNAL PROCESSING CIRCUIT |
摘要 |
PURPOSE:To provide a multiple sub sample signal processing circuit whose circuit scale is small. CONSTITUTION:The output signal of a signal processing circuit 2 is interpolated in a field by an animation LPF/enhancer 11 and the output signal of a still picture interpolation circuit 5 is still-picture enhanced by the animation LPF/ enhancer 11. The signal interpolated in the field is animation enhanced by an animation enhancer 4 and a mixing circuit 8 proportionately mixes the animation enhanced signal and the still-picture enhanced signal. Since the animation LPF/enhancer 11 is provided with an LPF for limiting a band characteristic to a horizontal frequency 4MHZ, the line memory of the animation LPF and the line memory of the enhancer can be made common and the circuit scale is reduced. |
申请公布号 |
JPH0646381(A) |
申请公布日期 |
1994.02.18 |
申请号 |
JP19920217101 |
申请日期 |
1992.07.23 |
申请人 |
VICTOR CO OF JAPAN LTD |
发明人 |
MACHIDA YUICHI;UCHIDA TOMOAKI;KITAURA MASAHIRO |
分类号 |
H04N5/208;H04N7/00;H04N7/015;H04N19/00 |
主分类号 |
H04N5/208 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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