发明名称 MEMORY SYSTEM FOR LOADING PERIPHERALS ON POWER UP
摘要 <p>A non-volatile memory (12) connected to state logic (20) for autoloading peripheral target devices at power-on or system reset. The memory is preloaded (40) with commands and data. At power-on or system reset the commands are executed in sequence, transferring data to selected target devices. Data is output in bit-serial fashion on a single line (18). Target devices are individually selected through use of separate clock lines (24-30). Clock signals on the clock lines can be internally generated using the state logic or a target-device-supplied clock can be received under program selection. The system reset signal (36) is intercepted and retransmitted (38) to control target device mode. System reset polarity, enable signal polarity, data block length, clock direction, internal clock frequency, and power-saving shutdown upon completion of all transfers are all programmably selectable command features.</p>
申请公布号 WO1994003858(A1) 申请公布日期 1994.02.17
申请号 US1993006527 申请日期 1993.07.12
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