| 摘要 |
<p>The invention relates to an electronic device for image analysis and artificial vision comprising an assembly of elementary processors (10) wherein each processor (10), associated with an image pixel, is interconnected by serial links (12) to n neighbouring processors (10), has an internal memory limited in size and may operate in SIMD mode on its internal data. Each processor may be connected or not to its n neighbouring processors according to a connection pattern which is a subpattern of the pattern for connecting physically the processors, enabling the related components of the image to be manipulated directly. An associative operator may be applied to said related components through asynchronous communications. A local member is provided to determine the moment when the data remain stable on the processor, stability detectors for the various processors being centralized by a network of OR gates towards the central controller which may determine the occurrence time of the end of computation. Application particularly to image analysis and to artificial vision.</p> |
