| 摘要 |
An array controller including a novel data path structure for effecting data transfers between a host computer system bus and four array busses associated with a RAID level 3 disk array without the utilization of a buffer between the host system and the array. The data path structure includes a host register associated with each array bus, each host register being connected to the host bus for receiving data therefrom; a first array register associated with each array bus, each first array register being connected to a corresponding host register for receiving data therefrom and connected to its associated array bus for providing data thereto; and a second array register associated with each array bus, each second array register being connected to it associated array bus for receiving data therefrom and connected to the host bus for providing data thereto. A state machine coordinates the operation of the host and array registers to effect RAID level 3 read and write transfers between the host system and four array channels. The state machine includes logic for generating, in response to a write request from the host system, strobe signals for effecting the transfer of data from the host bus into the host registers, for effectuating the transfer of data from the host registers into corresponding first array registers, and for bringing about the transfer of data from the first array registers onto their corresponding array busses. In response to a read request, logic within the state machine generates strobe signals which are provided to the second array registers for effecting the transfer of data from the array busses into corresponding second array registers and the transfer of data from the second array registers onto the host bus. |
