发明名称 Input/output cache
摘要 A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Virtual memory addresses used by the input/output devices are translated into real addresses in the system memory. Virtual memory can be partitioned, with some virtual addresses being mapped to a second memory attached to the input/output bus.
申请公布号 US5287482(A) 申请公布日期 1994.02.15
申请号 US19920912043 申请日期 1992.07.09
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 ARIMILLI, RAVI K.;DHAWAN, SUDHIR;NICHOLSON, JAMES O.;SIEGEL, DAVID W.
分类号 G06F12/08;(IPC1-7):G06F13/00 主分类号 G06F12/08
代理机构 代理人
主权项
地址