Buried bit-line source-side injection flash memory cell

摘要

The present invention provides a flash EPROM cell structure that has the advantages of source-side injection, but which is formed in such a way as to allow it to be utilized in a virtual-ground buried bit-line array layout. The buried bit-line array confers two advantages over the more conventional T-cell array. It allows contacts to be shared among a large number of cells, thereby reducing the layout area associated with each cell. This leads to smaller chip size. Moreover, the yield of the array is significantly increased due to the drastic reduction in the total number of contacts in the array.