发明名称 Output circuit with output enabling inputs
摘要 An output circuit for semiconductor integrated circuit includes control means. It receives an input signal, a reference signal, and a control signal, each having first and second states. When both reference and control signals are in their first state, the control means provides a signal in accordance with the input signal. Output means develops an output signal according to the state of the signal developed by the control means. The timing at which the control signal is placed in its first state is delayed relative to the reference signal in its first state. The time of delay is controlled to change the timing of occurrence of the output signal from the output means.
申请公布号 US5285117(A) 申请公布日期 1994.02.08
申请号 US19920957403 申请日期 1992.10.06
申请人 MITSUBISHI DENKI KABUSHIKI KAISHA 发明人 FURUTANI, KIYOHIRO
分类号 G01R31/26;G11C11/401;G11C11/409;H03K19/00;H03K19/003;H03K19/0175;H03K19/094;(IPC1-7):H03K19/003 主分类号 G01R31/26
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