EXPOSING METHOD OF SEMICONDUCTOR DEVICE FABRICATING PROCESS

摘要

The method for aligning and exposing the semiconductor wafer regardless of the die size comprises steps: (a) patterning the alignment key on a first region (B+C) by exposing and developing with a first reticle, which region is a part of the whole field (A+B+C+D); (b) changing to a second reticle for patterning a second region (A+B), and shifting a stage (16); (c) exposing after aligning the alignment key patterned on a part (B) of the first region and the second reticle; (d) changing to a third reticle for patterning a third region (C+D), and shifting the stage; and (e) exposing after aligning the alignment key patterned on a part (C) of the first region and the third reticle.