| 摘要 |
PURPOSE:To prevent the overflow and the underflow of a buffer memory of the receiver side and to improve the quality of the reproduced voice signal by synchronizing the voice sampling clock of the transmitter side with the voice reproduced clock of the receiver side. CONSTITUTION:A voice packet production circuit 1 turns the input voice signal into a packet through a clock generating circuit 2 and sends this packet to a packet transmitter circuit 4. A packet generation part 3 generates a clock synchronizing packet which is sent to a packet network through the circuit 4. Then a receiver circuit 5 sends a voice packet to a reproducing circuit 6 and the clock synchronizing packet to an average cycle time calculation part 7 respectively. The part 7 calculates the difference between the average cycle time of the received clock synchronizing packet and the transmitting cycle time of the clock synchronizing packet generated by the circuit 2. Then a dividing circuit 8 is controlled based on the preceding calculated difference so that a cycle equal to the voice signal sampling cycle of a device of the transmitter side is secured. Thus the synchronization is secured between the sampling clock of the transmitter side and the reproduced clock of the receiver side.
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