| 摘要 |
<p>PURPOSE:To input an external clock signal with low frequency and to form an internal clock signal with high frequency in an LSI based upon the external clock signal. CONSTITUTION:This clock signal generating circuit is provided with a flip flop (FF) 1 for forming a signal F synchronized with an external clock CKO, an oscillation circuit (oscillator) 2 for outputting an internal clock signal CKI whose oscillation start and stop are controlled by the signal F and a pulse counting circuit (counter) 3. The counter 3 counts up internal clock signals CKI, and when the count value reaches a set value, generates a reset signal N to the FF 1 to stop its oscillation.</p> |
