发明名称 METHOD FOR FORMATION OF FLOATING GATE MEMBER OF NONVOLATILE MEMORY CELL AND FLOATING GATE MEMBER
摘要 PURPOSE: To reduce the number of tail bits by providing small and uniform particles within a boundary area between a floating gate and tunnel oxide. CONSTITUTION: P<31> is injected into a strip 38a up to a level of about (1 to 8)×10<14> /cm<2> . A thin polysilicon layer 45 is lightly doped, making polysilicon particles in the thin polysilicon layer to be smaller in size. Therefore, a part formed of the thin polysilicon layer 45 of the strip 38a, that is, the particle size of a part closest to a tunnel oxide 39 becomes small because the layer 45 is thin and it is lightly doped. As a result, the change in threshold voltage between the gates after deletion is reduced greatly and the distribution of deleted voltage becomes dense. Therefore the number of tail bits having a lower threshold voltage than the desired value or the number of tail bits which intend to fail after cycling can be reduced to the most extent.
申请公布号 JPH0629540(A) 申请公布日期 1994.02.04
申请号 JP19910228491 申请日期 1991.08.15
申请人 INTEL CORP 发明人 BIINNYON UU
分类号 H01L21/8247;H01L29/788;H01L29/792;(IPC1-7):H01L29/788 主分类号 H01L21/8247
代理机构 代理人
主权项
地址