| 摘要 |
PURPOSE:To need not provide a wiring for test in a signal processing circuit and to shorten the test time by providing a switch circuit making a write signal from the outside a read signal to a storage circuit at a test time. CONSTITUTION:In a test mode when a test signal TST is an active level, the write signal WT from the outside is supplied as the read signal IRD to the storage circuit 1 by the switch circuit 3. Then, since data DTW for write is written in a storage element MC by the write signal with a read/write cycle and read through a read circuit and inputted to the signal processing circuit 2, it is unnecessitated that the data as well for test is written in the storage circuit 1 temporarily, and is read in next read/write cycle and inputted to the signal processing circuit 2 as usual, and the test time is reduced. Further, the wiring in the signal processing circuit 2 need not be provided. |
