发明名称 FAIL-SAFE LOGICAL OPERATION CIRCUIT USING ELECTROMAGNETIC COUPLING
摘要 A fail-safe logical operation circuit which includes a transformer (T) for converting binary input signals to magnetic flux to sum them up, and a level detector (1) for detecting this sum and generating binary outputs having logical values of "1" and "0". In this way, the fail-safe circuit can simplify the circuit construction and can reduce the level of the logical output.
申请公布号 WO9402992(A1) 申请公布日期 1994.02.03
申请号 WO1992JP00911 申请日期 1992.07.16
申请人 THE NIPPON SIGNAL CO., LTD.;ESASHI, MASAYOSHI 发明人 ESASHI, MASAYOSHI;ASADA, NORIHIRO;KATO, MASAKAZU;FUTUHARA, KOICHI
分类号 H03K19/007;(IPC1-7):H03K19/007 主分类号 H03K19/007
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