| 摘要 |
An address storing device 30 stores a segment address based on data D0-D7 applied from a CPU 10 of a computer. An IC memory card 90 coupled to the computer is sensed at 40 and addressed, 15, with the low-order 8 bits SA16-SA23 of an address applied from the CPU, with the high-order 8 bits SA16-SA23 of the stored segment address, and with the sum obtained by adding high-order bits A8-A15 of the CPU-supplied address to the low-order 8 bits SA8-SA15 of the stored segment address. In accordance with a memory request signal and a read/write signal from the CPU, a chip enable signal and a data enable signal are applied to the IC memory card, thereby accessing data stored in the IC memory card by the CPU, via a buffer 70. <IMAGE> |
