| 摘要 |
<p>The invention relates to the devices which make it possible to protect the writing and/or the erasing of programmable integrated memories against falls in voltage of the voltage source which supplies the normal operating voltage Vcc of the logic circuits of these memories. It consists in powering this memory (101) from the source of programming and/or erasing voltage Vpp via an MOS transistor (102) of the P type. The gate of this transistor is itself linked to earth via an MOS transistor (104) of the N type. The normal operating power supply voltage Vcc is applied to the gate of this second transistor. When this voltage Vcc falls below a certain value, for which the logic still operates correctly, the second transistor turns off, which entails the turning-off of the first transistor and the cutting off of the power supply of the memory by the voltage Vpp. It makes it possible to avoid having eroneous data in the programmable memory. <IMAGE></p> |
